Is a bad practice make variations on power's tracks width in pcb? The Next CEO of Stack OverflowBypass capacitors needed in low-frequency digital logic systems?VCC trace routing on a two-layer board with TQFP chipPCB and trace design for high-speed TTLReturn current in 8 Layer stackupRouting a buck/boost DC/DC converterProper GND pours for two-layer PCBs?Restrict area trouble in EagleDetails on PCB layout for microcontrollerPCB layout: am I doing local power nets correctly?Choosing the right stackup for 6 or 8 layers

Is it a bad idea to plug the other end of ESD strap to wall ground?

Is it possible to create a QR code using text?

How to avoid supervisors with prejudiced views?

What did the word "leisure" mean in late 18th Century usage?

Strange use of "whether ... than ..." in official text

How can I force the size of an int for debugging purposes?

Trying to insert a background image via TikZ results in extra white-space around the corners

Why was Sir Cadogan fired?

How to pronounce fünf in 45

Direct Implications Between USA and UK in Event of No-Deal Brexit

Do I need to write [sic] when including a quotation with a number less than 10 that isn't written out?

Is it reasonable to ask other researchers to send me their previous grant applications?

Plausibility of squid whales

Prodigo = pro + ago?

Traveling with my 5 year old daughter (as the father) without the mother from Germany to Mexico

An elegant way to define a sequence

Percent Dissociated from Titration Curve

Cannot restore registry to default in Windows 10?

Shortening a title without changing its meaning

Read/write a pipe-delimited file line by line with some simple text manipulation

How dangerous is XSS

Man transported from Alternate World into ours by a Neutrino Detector

Physiological effects of huge anime eyes

How to implement Comparable so it is consistent with identity-equality



Is a bad practice make variations on power's tracks width in pcb?



The Next CEO of Stack OverflowBypass capacitors needed in low-frequency digital logic systems?VCC trace routing on a two-layer board with TQFP chipPCB and trace design for high-speed TTLReturn current in 8 Layer stackupRouting a buck/boost DC/DC converterProper GND pours for two-layer PCBs?Restrict area trouble in EagleDetails on PCB layout for microcontrollerPCB layout: am I doing local power nets correctly?Choosing the right stackup for 6 or 8 layers










2












$begingroup$


Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
The frequency of the signals are not high , a few units of KHz, something near 10kHz.



I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.



enter image description here










share|improve this question









$endgroup$
















    2












    $begingroup$


    Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
    The frequency of the signals are not high , a few units of KHz, something near 10kHz.



    I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.



    enter image description here










    share|improve this question









    $endgroup$














      2












      2








      2


      1



      $begingroup$


      Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
      The frequency of the signals are not high , a few units of KHz, something near 10kHz.



      I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.



      enter image description here










      share|improve this question









      $endgroup$




      Its is about a circuit to source power and communicate with a car's key. I don't know exactly the current necessary, but I know that it is low, a few mA. The voltages are 5.5V and 3.3V.
      The frequency of the signals are not high , a few units of KHz, something near 10kHz.



      I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic. The signalized on the figure are GND, and VCC.



      enter image description here







      pcb-design






      share|improve this question













      share|improve this question











      share|improve this question




      share|improve this question










      asked 3 hours ago









      DanielDaniel

      18010




      18010




















          2 Answers
          2






          active

          oldest

          votes


















          3












          $begingroup$


          I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.




          At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.



          It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).






          share|improve this answer









          $endgroup$




















            0












            $begingroup$

            I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.






            share|improve this answer









            $endgroup$












            • $begingroup$
              This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
              $endgroup$
              – KingDuken
              2 hours ago










            • $begingroup$
              I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
              $endgroup$
              – ammar.cma
              2 hours ago











            Your Answer





            StackExchange.ifUsing("editor", function ()
            return StackExchange.using("mathjaxEditing", function ()
            StackExchange.MarkdownEditor.creationCallbacks.add(function (editor, postfix)
            StackExchange.mathjaxEditing.prepareWmdForMathJax(editor, postfix, [["\$", "\$"]]);
            );
            );
            , "mathjax-editing");

            StackExchange.ifUsing("editor", function ()
            return StackExchange.using("schematics", function ()
            StackExchange.schematics.init();
            );
            , "cicuitlab");

            StackExchange.ready(function()
            var channelOptions =
            tags: "".split(" "),
            id: "135"
            ;
            initTagRenderer("".split(" "), "".split(" "), channelOptions);

            StackExchange.using("externalEditor", function()
            // Have to fire editor after snippets, if snippets enabled
            if (StackExchange.settings.snippets.snippetsEnabled)
            StackExchange.using("snippets", function()
            createEditor();
            );

            else
            createEditor();

            );

            function createEditor()
            StackExchange.prepareEditor(
            heartbeatType: 'answer',
            autoActivateHeartbeat: false,
            convertImagesToLinks: false,
            noModals: true,
            showLowRepImageUploadWarning: true,
            reputationToPostImages: null,
            bindNavPrevention: true,
            postfix: "",
            imageUploader:
            brandingHtml: "Powered by u003ca class="icon-imgur-white" href="https://imgur.com/"u003eu003c/au003e",
            contentPolicyHtml: "User contributions licensed under u003ca href="https://creativecommons.org/licenses/by-sa/3.0/"u003ecc by-sa 3.0 with attribution requiredu003c/au003e u003ca href="https://stackoverflow.com/legal/content-policy"u003e(content policy)u003c/au003e",
            allowUrls: true
            ,
            onDemand: true,
            discardSelector: ".discard-answer"
            ,immediatelyShowMarkdownHelp:true
            );



            );













            draft saved

            draft discarded


















            StackExchange.ready(
            function ()
            StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2felectronics.stackexchange.com%2fquestions%2f430164%2fis-a-bad-practice-make-variations-on-powers-tracks-width-in-pcb%23new-answer', 'question_page');

            );

            Post as a guest















            Required, but never shown

























            2 Answers
            2






            active

            oldest

            votes








            2 Answers
            2






            active

            oldest

            votes









            active

            oldest

            votes






            active

            oldest

            votes









            3












            $begingroup$


            I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.




            At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.



            It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).






            share|improve this answer









            $endgroup$

















              3












              $begingroup$


              I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.




              At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.



              It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).






              share|improve this answer









              $endgroup$















                3












                3








                3





                $begingroup$


                I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.




                At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.



                It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).






                share|improve this answer









                $endgroup$




                I would like to know if variation on tracks's width like the signalized in red on the figure below are very problematic.




                At 10 kHz (or probably even 10 MHz), the indicated trace width variations are not significant.



                It's pretty common to have this kind of feature in a design. Particularly when high currents are involved you might want the trace as wide as possible to minimize voltage drop, but need to narrow it down in certain areas to fit other traces or components. In a DC or low-frequency AC power track this will cause no problem as long as the narrow section is short (you could calculate the actual resistance effect and be sure it doesn't exceed your requirements).







                share|improve this answer












                share|improve this answer



                share|improve this answer










                answered 2 hours ago









                The PhotonThe Photon

                86.8k398201




                86.8k398201























                    0












                    $begingroup$

                    I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.






                    share|improve this answer









                    $endgroup$












                    • $begingroup$
                      This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                      $endgroup$
                      – KingDuken
                      2 hours ago










                    • $begingroup$
                      I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                      $endgroup$
                      – ammar.cma
                      2 hours ago















                    0












                    $begingroup$

                    I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.






                    share|improve this answer









                    $endgroup$












                    • $begingroup$
                      This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                      $endgroup$
                      – KingDuken
                      2 hours ago










                    • $begingroup$
                      I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                      $endgroup$
                      – ammar.cma
                      2 hours ago













                    0












                    0








                    0





                    $begingroup$

                    I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.






                    share|improve this answer









                    $endgroup$



                    I think the significance of trace length and geometry matters for higher frequencies where intereference from reflections can be critical. I think sub < 1 MHz designs shoud be still okay.







                    share|improve this answer












                    share|improve this answer



                    share|improve this answer










                    answered 2 hours ago









                    ammar.cmaammar.cma

                    497312




                    497312











                    • $begingroup$
                      This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                      $endgroup$
                      – KingDuken
                      2 hours ago










                    • $begingroup$
                      I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                      $endgroup$
                      – ammar.cma
                      2 hours ago
















                    • $begingroup$
                      This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                      $endgroup$
                      – KingDuken
                      2 hours ago










                    • $begingroup$
                      I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                      $endgroup$
                      – ammar.cma
                      2 hours ago















                    $begingroup$
                    This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                    $endgroup$
                    – KingDuken
                    2 hours ago




                    $begingroup$
                    This is a fair answer but is there anything to provide any proof? i.e. standard specifications that talk about track widths?
                    $endgroup$
                    – KingDuken
                    2 hours ago












                    $begingroup$
                    I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                    $endgroup$
                    – ammar.cma
                    2 hours ago




                    $begingroup$
                    I think the OP is worried about cross-talk which happens at almost all frequencies. However, my knowledege comes from reading High Speed Design guidelines and iterating through multiple designs.
                    $endgroup$
                    – ammar.cma
                    2 hours ago

















                    draft saved

                    draft discarded
















































                    Thanks for contributing an answer to Electrical Engineering Stack Exchange!


                    • Please be sure to answer the question. Provide details and share your research!

                    But avoid


                    • Asking for help, clarification, or responding to other answers.

                    • Making statements based on opinion; back them up with references or personal experience.

                    Use MathJax to format equations. MathJax reference.


                    To learn more, see our tips on writing great answers.




                    draft saved


                    draft discarded














                    StackExchange.ready(
                    function ()
                    StackExchange.openid.initPostLogin('.new-post-login', 'https%3a%2f%2felectronics.stackexchange.com%2fquestions%2f430164%2fis-a-bad-practice-make-variations-on-powers-tracks-width-in-pcb%23new-answer', 'question_page');

                    );

                    Post as a guest















                    Required, but never shown





















































                    Required, but never shown














                    Required, but never shown












                    Required, but never shown







                    Required, but never shown

































                    Required, but never shown














                    Required, but never shown












                    Required, but never shown







                    Required, but never shown







                    Popular posts from this blog

                    Which organization defines CJK Unified Ideographs? The Next CEO of Stack OverflowCharacters which have several different shapesHow useful are the kanji in reading Chinese?Can Chinese readers scan large amounts of text faster/more accurately than their alphabet-using counterparts?丼: why is “well” also “bowl of food”?What Does Unicode 8.0 Mean For Chinese?How are blanks indicated for placeholders in Chinese (like ???)Is there a dictionary of standard character variants?How to display CJK Extension F?How is it decided as to which character is used on the tech terminology?How does 子 come to mean 'midnight'?

                    Was it really necessary for the Lunar Module to have 2 stages?Did the Apollo lunar module descent stage have a role as a sort of service module?How was reserve fuel calculated for the Apollo missions?Could the Apollo LM abort mode be engaged after touchdown? What would have happened if it was?Is true that Armstrong was not designated as first to walk on the moon?Where is the first Lunar soil sample currently located?Could a single crew member fly the Apollo LM?How much mass could the Saturn V rockets have landed on the Moon if nothing was coming back?What was the Apollo service module propellant used for on the LEO missions?Could the Apollo LM abort mode be engaged after touchdown? What would have happened if it was?Did the combined Command and Service Module and Lunar Module perform another 180° turn after transposition, docking and extraction?How did the Lunar Module dock with the rest of Apollo 11 and what is the “CSM”?Was there a technical reason why Apollo 10 didn't land on the moon?How long is the Apollo Lunar Module extraction window?

                    Shenzhen Football Club Índice Elenco atual | Títulos | Referências Ligações externas | Menu de navegaçãoGooglenotíciaslivrosacadêmicoeditar«"Elenco"»Site oficialexpandindo-oeee